1 ps8155a 11/06/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74alvch16500 18-bit universal bus transceiver with 3-state outputs logic block diagram product description pericom semiconductor?s pi74alvch series of logic circuits are produced using the company?s advanced 0.5 micron cmos technology, achieving industry leading speed. the 18-bit pi74alvch16500 univeral bus transceiver is designed for 2.3v to 3.6v vcc operation. data flow in each direction is controlled by output enable (oeab and oeba), latch- enable (leab and leba), and clock (clkab and clkba) inputs. for a- to-b data flow, the device operates in the transparent mode when leab is high. when leab is low, the a data is latched if clkab is held at a high or low logic level. if leab is low, the a data is stored in the latch/flip-flop on the high- to-low transition of clkab. output-enable oeab is active high. when oeab is high, the b-port outputs are active. when oeab is low, the b-port outputs are in the high-impedence state. data flow for b to a is similar to that of a to b but uses oeba, leba, and clkba. the output enables are complementary (oeab is active high and oeba is active low). to ensure the high-impedance state during power up or power down, oeba should be tied to vcc through a pull-up resistor and oeab should be tied to gnd through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/ current-sourcing capability of the driver. active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. product features pi74alvch16500 is designed for low voltage operation v cc = 2.3v to 3.6v hysteresis on all inputs typical v olp (output ground bounce) < 0.8v at v cc = 3.3v, t a = 25c typical v ohv (output v oh undershoot) < 2.0v at v cc = 3.3v, t a = 25c bus hold retains last active bus state during 3-state eliminating the need for external pullup resistors industrial operation at ?40c to +85c packages available: ? 56-pin 240 mil wide plastic tssop (a) ? 56-pin 300 mil wide plastic ssop (v) clkba to 17 other channels oeba a1 c1 1d 3 27 30 clkab leab leba 28 2 55 oeab 1 1d c1 clk 1d c1 clk b1 54
pi74alvch16500 18-bit universal bus transceiver 2 ps8155a 11/06/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pin name description oe output enable input (active high) le latch enable (active high) clk clock input (active low) ax data i/o bx data i/o gnd ground v cc power 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 25 26 27 28 32 31 30 29 product pin description truth table (1) ? note: 1. h = high signal level l = low signal level z = high impedance = high-to-low transition product pin configuration 56-pin a, v oeab leab a1 gnd a2 a3 v cc a4 a5 a6 gnd a7 a8 a9 a10 a11 a12 gnd a13 a14 a15 v cc a16 a17 gnd a18 oeba leba gnd clkab b1 gnd b2 b3 v cc b4 b5 b6 gnd b7 b8 b9 b10 b11 b12 gnd b13 b14 b15 vcc b16 b17 gnd b18 clkba gnd ? a-to-b data flow is shown: b-to-a flow is similar but uses oeba, leba, clkba. ? output level before the indicated steady-state input conditions were established. s t u p n i b t u p t u o b a e ob a e lb a k l ca lxx x z hh x l l hh x h h hl ll hl hh hll or hx b0?
pi74alvch16500 18-bit universal bus transceiver 3 ps8155a 11/06/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 storage temperature ......................................................... ?65c to +150c ambient temperature with power applied ........................ ?40c to +85c input voltage range, v in .................................................. ?0.5v to v cc +0.5v output voltage range, v out ........................................... ?0.5v to v cc +0.5v dc input voltage ................................................................. ?0.5v to +5.0v dc output current ........................................................................... 100 ma power dissipation ................................................................................ 1.0w note: stresses greater than those listed under maxi- mum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other condi- tions above those indicated in the operational sec- tions of this specification is not implied. exposure to absolute maximum rating conditions for ex- tended periods may affect reliability. maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) note: 1. unused control inputs must be held high or low to prevent them from floating. s r e t e m a r a pn o i t p i r c s e ds n o i t i d n o c t s e t. n i m. p y t. x a ms t i n u v c c e g a t l o v y l p p u s3 . 26 . 3 v v h i e g a t l o v h g i h t u p n i v c c v 7 . 2 o t v 3 . 2 =7 . 1 v c c v 6 . 3 o t v 7 . 2 =0 . 2 v l i e g a t l o v w o l t u p n i v c c v 7 . 2 o t v 3 . 2 =7 . 0 v c c v 6 . 3 o t v 7 . 2 =8 . 0 v n i e g a t l o v t u p n i0v c c v t u o e g a t l o v t u p t u o0v c c i h o t n e r r u c t u p t u o l e v e l - h g i h v c c v 3 . 2 =2 1 - a m v c c v 7 . 2 =2 1 - v c c v 0 . 3 =4 2 - i l o t n e r r u c t u p t u o l e v e l - w o l v c c v 3 . 2 =2 1 v c c v 7 . 2 =2 1 v c c v 0 . 3 =4 2 t a e r u t a r e p m e t r i a - e e r f g n i t a r e p o0 4 -5 8c recommended operating conditions (1)
pi74alvch16500 18-bit universal bus transceiver 4 ps8155a 11/06/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 3.3v 10%) s r e t e m a r a ps n o i t i d n o c t s e tv c c ) 1 ( . n i m. p y t ) 2 ( . x a ms t i n u v h o i h o 0 0 1 - = m a. x a m o t . n i mv c c -2 . 0 v i h o 6 - =ma v h i =v 7 . 1v 3 . 20 . 2 i h o 2 1 - =ma v h i =v 7 . 1v 3 . 27 . 1 v h i =v 0 . 27 . 2v 2 . 2 v h i =v 0 . 2v 0 . 34 . 2 i h o 4 2 - =ma v h i v 0 . 2 =v 0 . 30 . 2 v l o i l o 0 0 1 = m a. x a m o t . n i m2 . 0 i l o =a m 6v l i =v 7 . 0v 3 . 24 . 0 i l o 2 1 =ma v l i =v 7 . 0v 3 . 27 . 0 v l i =v 8 . 0v 7 . 24 . 0 i l o =a m 4 2v l i =v 8 . 0v 0 . 35 5 . 0 i i v i =v c c d n g r ov 6 . 35 m a i i ) d l o h ( ) 3 ( v i =v 7 . 0 v 3 . 2 5 4 v i =v 7 . 15 4 - v i =v 8 . 0 v 0 . 3 5 7 v i =v 0 . 25 7 - v i =v 6 . 3 o t 0v 6 . 30 0 5 i z o ) 4 ( v o =v c c d n g r ov 6 . 30 1 i c c v i =v c c d n g r oi o 0 =v 6 . 30 4 d i c c v t a t u p n i e n o c c v t a s t u p n i r e h t o , v 6 . 0 - c c d n g r ov 6 . 3 o t v 30 5 7 c i s t u p n i l o r t n o cv i =v c c d n g r ov 3 . 34f p c o i s t r o p b r o av o =v c c d n g r ov 3 . 38f p notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device typ e. 2. typical values are at v cc = 3.3v, +25c ambient and maximum loading. 3. bus hold maximum dynamic current required to switch the input from one state to another. 4. for i/o ports, the i oz includes the input leakage current.
pi74alvch16500 18-bit universal bus transceiver 5 ps8155a 11/06/00 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 timing requirements over operating range switching characteristics over operating range (1) pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com s r e t e m a r a p m o r f ) t u p n i ( o t ) t u p t u o ( s n o i t i d n o c ) 1 ( v c c v 2 . 0 v 5 . 2 =v c c v 7 . 2 =v c c v . 0 v 3 . 3 = s t i n u . n i m ) 2 ( . x a m. n i m ) 2 ( . x a m. n i m ) 2 ( . x a m f x a m c l f p 0 5 = r l 0 0 5 = w 0 5 10 5 10 5 1z h m t d p b r o aa r o b 0 . 1 1 . 57 . 419 . 3 s n e lb r o a9 . 55 . 53 . 17 . 4 k l cb r o a6 . 66 . 61 . 15 . 5 t n e b a e ob 7 . 54 . 50 . 16 . 4 t s i d b a e ob 1 . 67 . 55 . 10 . 5 t n e a b e oa 2 . 62 . 60 . 12 . 5 t s i d a b e oa 4 . 56 . 40 . 13 . 4 notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. s r e t e m a r a pn o i t p i r c s e ds n o i t i d n o c ) 1 ( v c c v 2 . 0 v 5 . 2 =v c c v 7 . 2 =v c c v 3 . 0 v 3 . 3 = s t i n u . n i m. x a m. n i m. x a m. n i m. x a m f k c o l c y c n e u q e r f k c o l c c l f p 0 5 = r l 0 0 5 = w 00 5 100 5 10 0 5 1z h m t w e s l u p n o i t a r u d h g i h e l3 . 33 . 33 . 3 s n w o l r o h g i h k l c3 . 33 . 33 . 3 t u s p u t e s e m i t k l c e r o f e b a t a d 7 . 14 . 13 . 1 e l e r o f e b a t a d h g i h k l c ,1 . 10 . 10 . 1 e l e r o f e b a t a d w o l k l c ,9 . 16 . 14 . 1 t h d l o h e m i t k l c r e t f a a t a d - 7 . 16 . 13 . 1 e l r e t f a a t a d h g i h k l c0 . 28 . 15 . 1 e l r e t f a a t a d w o l k l c6 . 15 . 12 . 1 d / t d v ) 2 ( l l a f r o e s i r n o i t i s n a r t t u p n i00 100 10 0 1v / s n notes: 1. see test circuit and waveforms. 2. unused control inputs must be held high or low to prevent them from floating. operating characteristics, t a = 25 o c r e t e m a r a ps n o i t i d n o c t s e t v c c v 2 . 0 v 5 . 2 =v c c v 3 . 0 v 3 . 3 = s t i n u l a c i p y t c d p n o i t a p i s s i d r e w o p e c n a t i c a p a c d e l b a n e s t u p t u o c l f p 0 5 = z h m 0 1 = f 0 41 5 f p d e l b a s i d s t u p t u o66
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